actually I'm slightly surprised since I would guess that as an EMC employee you would have better sources to get this kind of information, but these would be my guesses.
1: I don't know if this is that usefull when you are talking about an array? The TRIM command is designed for the ATA interface standard, and the EFD's used in the arrays don't use the ATA interface as far as I am aware. Also I sure hope that EMC implemented some ways to reduce the effects of write amplification. You might also find some more info in this blog post by Barry Burke
2: From which point of view? You only need to use disk alignment on some filesystems/operating systems and recommendations vary upon the application you might be using. If you go further back in to the array you have the cache working with the back end and on DMX3, DMX4 and V-Max the back end always writes full 64K tracks. Before the DMX3 it used to the 32K for all fixed block architecture devices.
Hope that helps,