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Can anyone knows about the circuit level architecture of a director within the VMAX All Flash's engine?
It would great if anyone can explain the circuitry & circuits element (e.g. vault memory, global cache, core pool, MCH (Hub)) within the VMAX All flash engine.
SuhelaDighe
70 Posts
0
April 30th, 2018 09:00
Maybe we should move this to a Support community her on the DECN.