I'm new to the VMAX and am just trying to understand the layout mapping on the VMAX, using the following:
If I try and correlate what I see above to what I'm seeing in symmetric manager:
Can someone help me correlate for example what E0 in the physical diagram maps to and the correlation to which side? Sorry for the stupid question, just trying to get a better appreciation for how the device is cabled.
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Go to support.emc.com and search for a document titled Symmetrix VMAX Family Physical Planning Guide. In the section titled 'Planning host connections' there is a picture on page 22 of the back of the 10K with the E, F, G, and H ports identified.
The first diagram indicate two different directors. In VMAX 10K, The even director FA is from 1E to 1H, the odd director is from 2E - 2H.
So I believe your second diagram is for even director.
With the 10K you can have Engines 1 - 4. Engine 1 contains directors 1 and 2, Engine 2 contains directors 3 and 4, Engine 3, contains directors 5 and 6, and Engine 4 contains directors 7 and 8. The FA are the frontend CPUs on each IO module.
So you are displaying Engine 1 in the first diagram with the odd director, Director 1, on the right, and the even director, Director 2, on the left.
Directors within an engine will always have the IO modules installed in pairs so each director will have identical IO modules.
So FA-1E corresponds to Dir1, FA CPU E, ports 0 and 1, and so on...
I had a doubt over CPU assignment in 10K, Since 10k has 12 CPU cores per engine how does the assignment of CPU would be , does the entire module 3 shared for CPU E & module 4 for CPU F and so on. if so there wont be a chance for CPU H, it would ends in E,F,G CPU's ( total of 6 from both directors )
FA-1E corresponds to Dir1, FA CPU E, ports 0 and 1.
Can some one please clarify
In the 1st version of the VMAX 10K model (with a x959xxxxx SN), a director board came with one 4-core CPU. With hyper-threading enabled, that provided 8 hyper-threads. Each emulation CPU or slice on the director board was assigned just a single hyper-thread.
Fast forward to the VMAX 10K-987 model (x987xxxxx SN), the director comes with a 6-core CPU. That provides 12 hyper threads. The 4 extra hyper threads are assigned to the back-end emulation CPUs (A through D). The front-end emulations (E through H) are still assigned one hyper thread.
Hope this clears things up for you.
Let me know if this helps out.
The 20K and 40K do not use hyper threading. However there is a new release of Enginuity for the 40K that enables hyper threading to enable more cores to be assigned to Ficon adapters.