Keeping pace with power efficiency

For more than a decade, IT shops have been wrestling with the overwhelming growth of data in the computing environment.  Industry websites, articles and whitepapers have been warning of the "data tsunami" for years. Typically, the emphasis is on new storage technology, but just as important is the ability to process this massive amount of new data. 

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Machine learning and AI are coming to play a big role in this space. In turn, the push for greater processing capabilities has also intensified, leading to ever higher power CPU capabilities and in particular, has resulted in the recent surge in the use of accelerator technologies (GPU, FPGA) to deliver the ultra high-speed parallel processing capabilities needed for compute-intensive AI applications.

These advanced AI technologies, as well as other increasing compute needs, demand a new power architecture to efficiently deliver more processing capability, and while this opportunity to re-design will bring a number of benefits, it is not a simple problem to solve.

The power problem

The push to higher processing capabilities brings with it a crucial system design issue related to electrical power delivery.  The finer manufacturing geometry of today’s processors (less than 10nm) allows for faster power switching, resulting in less delay and lower latency, in turn requiring lower voltage - sub 1 volt (V) - to drive processing.  But, following Ohm’s law (P=V*I), if power (P) increases and voltage (V) is lower, then current (I) must increase. This becomes a problem because delivering higher current to the processor die or "package" requires using more socket pins to carry the higher current – socket pins that could otherwise be used to provide greater system functionality (i.e., I/O, system management). For example, System on a Chip (SoC) designs put more functionality on the chip itself, so the question then becomes: how do you deliver more power efficiently, without losing potential functionality. This is important because, at scale, even very small gains in efficiency become significant; one watt per server for 100K servers may save hundreds of thousands of dollars over the lifecycles of those servers.

 

Increased voltage solution

One of the solutions finding acceptance in the industry today is to deliver increased voltage (e.g., 48V) to the server. At the Open Compute Project ("OCP") Summit 2016, Google announced an initiative to promote 48V server and distribution infrastructure as a standard for data centers. This model involves a number of changes to the delivery architecture (described below) that can provide the following advantages:

 

• more power to the processor (w/o reducing socket and connector pins and sizes)
• less energy loss in power conversion (fewer, more efficient conversions)
• less crowding on the motherboard design  (less power layers and trace areas)
• smaller cables, connectors and bus bars
• Lower power distribution losses
• higher power limits compared to 12V racks

 

The choice of 48V was made because it requires no special safety boundaries. Anything over 60V is considered "high voltage" and would require additional safety isolation. So, in using Ohm’s Law, 48V provides a four-fold reduction in current, but still leaves a margin of safety.

It should be noted that 48V servers were once promoted by Intel in the late 1990s, but at that time lost out to 12V server designs due to that era’s limited voltage regulator density and power conversion efficiency as well as higher component costs.

 

Power delivery

To understand the advantages of the 48V power model, it helps to first understand how power is delivered today. Today, a power utility typically delivers Alternating Current (AC) at 220 to 240V, which is in turn converted by a system’s Power Supply Unit (PSU) to 12V. It is converted again in a voltage regulator located on the system motherboard from 12V to 1.7V (we are using an Intel implementation example). This 1.7V rail is about twice the voltage ultimately needed by the CPU in order to reduce the current delivered from the motherboard so fewer pins can be used to deliver the power to the processor substrate. But power needs to be converted yet again on the die and substrate to get to the sub-one volt levels needed for the processor. 

 

Figure 1: Today’s 12 volt delivery model

 

Electrical distribution loss inefficiencies

At each conversion stage, some level of power/energy is lost. It has been estimated that the overall power efficiencies of today’s traditional data centers (from utilities to processors to cooling) have typically been in the mid-80% range, although the inefficiencies of today’s power supply units (PSUs) and on-board voltage regulators (VR) have already been well above 90%.  Also, this energy is lost in the form of heat, resulting in data centers needing to expend even more energy (and cost) to cool these higher performance systems. Increasing power efficiency (eliminating energy loss) ultimately allows data centers to save on cooling costs. Even a single percentage point increase in the efficiency carries significant financial and environmental gains.

 

Electrical distribution losses are a function of the square of the current (Power = I2R).  So, reducing the amount of current (I) through certain resistance (R) impacts the amount of loss.  Reducing current can be achieved by increasing voltage (Ohm’s law), thus fueling greater interest in the 48V model.

 

 

New power delivery approaches

At this point in time, effective power delivery to the high power processors remains a dynamic area; various approaches are being pursued. Two such approaches and the advantages of each are described below.

 

One approach to providing greater efficiency has been to deliver the 48 volts directly to the processor package substrate and then convert to sub 1V on the substrate. This approach eliminates one conversion stage (increasing efficiency) and allows delivery of very low current to the substrate (increasing pin availability).  However, given the highly limited space available on the package substrate, the power converter from 48V to sub-one volt needs to be of very high density and low profile, so implementing this technology is still very complex and expensive.

 

Figure 2: Direct to substrate 48 volt delivery model

 

Another approach has been to deliver the 48 volts to the motherboard.  At that point, a voltage regulator converts it to sub-one voltage (e.g., 0.85V) and then delivers it directly to the processor.  This approach also eliminates one conversion (increasing efficiency), but needs to deliver higher current to the substrate, which permits no saving in the number of power delivery pins. This approach is more common because it is less complex and less expensive than the direct delivery model.

 

Figure 3: 48 volt to motherboard delivery model

 

Other advantages

Some other advantages can also be derived from moving to the 48V model. For a fully integrated rack scale solution, because a 48V bus bar carries 4x less current than a 12 volt bus bar, it can potentially save 16x (I2) the electrical distribution loss if the same bus bar is used for rack power distribution.  This can result in a design practice of cables (or bus bars) being thinner (higher gauge) because they are carrying less current.

 

Both space and cost can be saved as components (connectors, capacitors, cables, and bus bars) are reduced in size, and as space is freed up, more design options are made available to system designers.

 

At the rack level these advantages are multiplied. The 48V in-rack power distribution model (similar to 12V rack level power distribution)  provides the opportunity to implement distributed Direct Current (DC)  UPS, and eliminates the need for the bulky facility-level Alternating Current (AC) UPS which, in addition to being voluminous, is inflexible and difficult to service.  In contrast, distributed DC UPS, coupled with modern lithium-based battery technologies, is more compact, light-weight, and easy to service.  It also has the added advantage of enabling a pay-as-you-go capability - i.e., adding capacity dynamically, anytime additional capacity is needed.

 

It’s still a 12 volt world

Regardless of the interest in 48V efficiencies, today’s 12V server motherboards have been around for 20+ years. Twelve volt infrastructure is commodity – it exists in huge volume in the world today - and today’s 12V supply chain is optimized. So the conversion to higher voltage will not be ubiquitous across the infrastructure. For example, hard drives will still be 12V to take advantage of the wide range of proven options in today’s storage market, so mainstream server designs will continue to incorporate 12V power for the foreseeable future. But with the insatiable thirst for processing power, one can expect more adoption of higher voltage supplied cartridges and motherboards, as we are already seeing in the AI and Machine Learning areas.

To be perfectly clear, 48V voltage regulator solutions suited for mainstream motherboard or processor package applications (i.e., with high density, efficiency and cost optimized) are still limited.  But leading power management semiconductor suppliers, together with the power conversion industry, are intensively working on it, and it is expected that more viable solutions will become available in the coming years.  Advances in processor and packaging technologies could usher in an era where the last stage conversion with high voltage conversion ratio can happen in the processor silicon and/or on its package substrate, and higher voltage can directly feed onto them.

Conclusion

One of the greatest challenges for data centers is the improvement in power efficiency. In so many cases the pursuit of greater efficiency boils down to saving energy and the associated operational cost, and in doing so, saving the total cost of ownership (TCO). So the need for even greater power usage makes it that much more important to squeeze out the highest levels of efficiency possible.  

 

Dell EMC works with a wide range of customers to help solve some of the most complex and interesting machine learning problems. The Extreme Scale Infrastructure (ESI) group is committed to staying abreast of the latest power technologies and applying them where they make sense, so that we can assist our customers in efficiently meeting their unabated demand for processing capability.

 

For more information on what Dell EMC Extreme Scale Infrastructure is doing with power technologies, contact ESI@dell.com.