Hi,

There is a fix in firmware Dell PERC H730/H730P/H830/FD33xS/FD33xD Mini/Adapter RAID Controllers firmware version 25.5.4.0006

-Fixes an issue where the battery could inadvertently change to WT during a transparent learn cycle.

I recommend updating to latest firmware version. 

 Please send a private message with your service tag to ensure we have all appropriate information on your system.

Thank you,

Hello,

Thank you for the quick reply. The weird part regarding this is why is not happening on a system which is actually the same in matter hardware components and drivers/Firmware version.

The upgrade to latest version will follow in the upcoming days.

In the mean time can you please tell me how exactly i can send you a private message ? I can't seem to have the option available .

Thank you

Hi,

Thank you for the service tag.

Even though the hardware is the same on the servers, the components are different. There may be an issue with the batteries on that is going to write through. I suggest going ahead with the recommended controller firmware update if not at that level already.

Look in the tty log and see if anything is going on with battery in the background. During the learn cycle, the cache policy will change to write through until the battery is charged once more. You should see something similar to:

09/22/16 12:27:36: EVT#03200-09/22/16 12:27:36: 195=BBU disabled; changing WB virtual disks to WT, Forced WB VDs are not affected

09/22/16 13:29:21: EVT#03205-09/22/16 13:29:21: 194=BBU enabled; changing WT virtual disks to WB

Hello again.

I've exported the log but i couldn't found anything like the lines you've mentioned. Before running the full upgrade over the system to see if the issue gets fixed, is there anyway i can send you the log to take a look over it.

Perhaps there's something that i missed between the thousands lines.

Later edit:

I've done a full system upgrade to latest SUU available and retry changing the Write Cache Policy. Still not working. I've selected the logs from the last 2 actions (hopefully).

T49: C0:stat=0 1 unsup=0
T49: C0:DDF_ConfigRead: perfect match found at pd=1, cod=43ec2b40
T49: C0:DDF_ConfigRead: reference found at pd=1, merging config
T49: C0:DDF_Merge: copying bvd record for ld=1, span=0 from pd=1 at partition=0
T49: C0:DDF_Merge: copying bvd record for ld=0, span=0 from pd=2 at partition=0
T50: C0:missingSpan =0 
T50: C0:missingSpan =0 
T50: C0:ddfInitStatus: 0 
T50: C0:configRaid: adding to raid config
T50: C0:Change in current cache property detected for LD : 0! to :4 from 5
T50: C0:EVT#02518-T50:  54=Policy change on VD 00/0 to [ID=00,dcp=05,ccp=04,ap=0,dc=1] from [ID=00,dcp=05,ccp=05,ap=0,dc=1]
T50: C0:configRaidAddSpan: adding ld=0 span=0
T50: C0:ArClearSSDArrayFlag - Enabling Dirty LBA Sorting for Array:0

T50: C0:Change in current cache property detected for LD : 1! to :4 from 5
T50: C0:EVT#02519-T50:  54=Policy change on VD 01/1 to [ID=01,dcp=05,ccp=04,ap=0,dc=1] from [ID=01,dcp=05,ccp=05,ap=0,dc=1]
T50: C0:configRaidAddSpan: adding ld=1 span=0
T50: C0:ArClearSSDArrayFlag - Enabling Dirty LBA Sorting for Array:1
T50: C0:EVT#02520-T50: 132=Dedicated Hot Spare created on PD 0f(e0x00/s9) (ded,rev,ea,ac=1)
T50: C0:DDF_HspHistWrite : pd=f, enclPd=0, slot=9, entryType=1
T50: C0:EVT#02521-T50: 132=Dedicated Hot Spare created on PD 10(e0x00/s8) (ded,rev,ea,ac=1)
T50: C0:DDF_HspHistWrite : pd=10, enclPd=0, slot=8, entryType=1
T50: C0:ddfInitStatus after CheckForOfflinePRL11VDs : 0 
T50: C0:oldCfgMapGet : oldAr=0, newAr=0
T50: C0:oldCfgMapGet : oldAr=1, newAr=1
T50: C0:init_cache: recoverCache = 0
T50: C0:init_cache: ***** VDs with pinned cache: 0x0000000000000000000000000000000000000000000000000000000000000000
T50: C0:Mem cache allocated size=0
T50: C0:Pinned cache data structures size=1017e0
T50: C0:Linear mem start=51c5e80 linear mem end=80000000
T50: C0:Virtual mem start=451c5e80 virtual mem end=80000000
T50: C0:Total linear memory bytes available=7ad38580
T50: C0:init_buffer: dif_enabled 0, full_sector_size 200 
T50: C0:1st pass calculation: num_bbs=30911 num_chs=30911 num_rhs=30911 
T50: C0:2nd pass calculation: num_bbs=78bf
T50: C0:init_buffer reservedForSec c14 
T50: C0:cache_header 452c7660, num_chs 6cab, row_header 46d312e0, num_rhs 6cab, bb_header 473cba00, num_bbs 6cab 
T50: C0:Size of: cache_header=380 row_header=e0 bb_header=8 Buffer=80
T50: C0:num_chs=6cab num_rhs=6cab num_bbs=6cab 
T50: C0:cache_header addr=452c7660 row_header addr=46d312e0 bb_header addr=473cba00 
T50: C0:Linear cache_mem_addr=7408000
T50: C0:Total memory available for disk cache: 7ad38580
T50: C0:cal_cache_size: totalLines=46 num_cache_line=6cab
T50: C0:Cache initialization complete...Config info
T50: C0:ARs configured: 2
T50: C0:Ar 0: size=74600000, numPd=12, seq=0, powerSave=0, powerSaveInProgress=0, activeLd=0x0000000000000000000000000000000000000000000000000000000000000001
T50: C0:PDs: 04(00/0) 14(00/10) 0c(00/11) 05(00/12) 09(00/13) 0e(00/14) 07(00/15) 15(00/16) 16(00/17) 11(00/18) 06(00/19) 02(00/1) 18(00/20) 0d(00/21) 17(00/22) 13(00/23) 08(00/2) 03(00/3)
T50: C0:Ar 1: size=74600000, numPd=4, seq=0, powerSave=0, powerSaveInProgress=0, activeLd=0x0000000000000000000000000000000000000000000000000000000000000002
T50: C0:PDs: 0a(00/4) 0b(00/5) 01(00/6) 12(00/7)
T50: C0:LD  0: L=1  SS=128  Size=417600000  NL=27819  DS=9 FB=200 UB=200 Status=3  DT=11099  BT=19424, Encr=0, pi=0, prop=[ID=00,dcp=05,ccp=04,ap=0,dc=1,dbgi=0,dps=00,cps=fe]
T50: C0:       span 0: sBlk=00000000, nBlk=74600000, ar=0
T50: C0:LD  1: L=1  SS=128  Size=e8c00000  NL=27819  DS=9 FB=200 UB=200 Status=3  DT=11099  BT=19424, Encr=0, pi=0, prop=[ID=01,dcp=05,ccp=04,ap=0,dc=1,dbgi=0,dps=00,cps=fe]
T50: C0:       span 0: sBlk=00000000, nBlk=74600000, ar=1
T50: C0:max-flush (Ar 0): 0x1b0
T50: C0:max-flush (Ar 1): 0x60
T50: C0:MAX_HASH_POOLS=8, NUM_CACHE_HASH_SLOTS_PER_POOL=1ccc
T50: C0:setup_cache_headers: ***** totalDirtyLines: 0 totalPinnedLines 0 recoverCache: 0 num_free_chs: 27819
T50: C0:pdFailHistInit: count=0
T50: C0:Bad Block Count for LD 0 is 0
T50: C0:Bad Block Count for LD 1 is 0
T50: C0:pdFailHistInit: count=0
T50: C0:LdRecoverNvram:ld 0
T50: C0:LdRecoverNvram:ld 1
T50: C0:CO: DIRTYFLAG : 0 
T50: C0:raid_task: FLUSH_ON_SYSTEM_RESET=0
T50: C0:CO: SUPERCAP  : 0 
T50: C0:Initializing write journal entries
T50: C0:NOT Flushing Cache
T50: C0:EVT#02522-T50: 505=Controller operating temperature within normal range, full operation restored

Overflow -- Text Discarded
=80000000

T51: C1:Virtual mem start=451c5e80 virtual mem end=80000000
T51: C1:Total linear memory bytes available=7ad38580
T51: C1:init_buffer: dif_enabled 0, full_sector_size 200 
T51: C1:1st pass calculation: num_bbs=30911 num_chs=30911 num_rhs=30911 
T51: C1:2nd pass calculation: num_bbs=78bf
T51: C1:cache_header 452c7660, num_chs c14, row_header 46d312e0, num_rhs c14, bb_header 473cba00, num_bbs c14 
T51: C1:*SECONDARY* cache_header 46a8cce0, num_chs c14, row_header 47322880, num_rhs c14, bb_header 47401f58, num_bbs c14 
T51: C1:Size of: cache_header=380 row_header=e0 bb_header=8 Buffer=80
T51: C1:num_chs=c14 num_rhs=c14 num_bbs=c14 
T51: C1:cache_header addr=46a8cce0 row_header addr=47322880 bb_header addr=47401f58 
T51: C1:Linear cache_mem_addr=73eb8000
T51: C1:Total memory available for disk cache: 7ad38580
T51: C1:cal_cache_size: totalLines=46 num_cache_line=c14
T51: C1:MAX_HASH_POOLS=8, NUM_CACHE_HASH_SLOTS_PER_POOL=333
T51: C1:setup_cache_headers: ***** totalDirtyLines: 0 totalPinnedLines 0 recoverCache: 1 num_free_chs: 3092
T51: C1:Setting the queue 0's lower base register to 0xc0092400
T51: C1:Setting the queue 1's lower base register to 0xc00977c0
T51: C1:Setting the queue 2's lower base register to 0xc009a700
T51: C1:Setting the queue 3's lower base register to 0xc009d640
T51: C1:Initializing write journal entries
T51: C0:******** Secondary core finished raid task ******** 
03/13/18  2:43:13: C0:EVT#02523-03/13/18  2:43:13:  44=Time established as 03/13/18  2:43:13; (51 seconds since power on)
03/13/18  2:43:18: C0:EVT#02524-03/13/18  2:43:18:  44=Time established as 03/13/18  2:43:18; (55 seconds since power on)
03/13/18  2:43:18: C0:DDF updates for pr properties disabled
03/13/18  2:43:18: C0: DDF updates for cc properties disabled
03/13/18  2:43:32: C0:FlashFind: Searching for HIIM :Found @:0x80200000(App:any)
03/13/18  2:43:32: C0:FlashFind: Searching for HIIM :Found @:0x80200000(App:any)
03/13/18  2:43:32: C0:LOAD section: src=fc0401ce, size=6bdfb, dst=0, mode=1...done
03/13/18  2:45:27: C0:EVT#02526-03/13/18  2:45:27:  30=Event log cleared
03/13/18  2:49:13: C0:EVT#02527-03/13/18  2:49:13: 242=Battery charge complete
03/13/18  3:25:30: C0:EVT#02528-03/13/18  3:25:30:  73=VD 01/1 Properties updated to [ID=01,dcp=15,ccp=15,ap=0,dc=1,dbgi=0,dps=00,cps=fe]
03/13/18  3:25:30: C0:LdDcmdRaidMapCompleteExt: Completing FW_RAID_MAP cmd
03/13/18  3:25:30: C0:ldIsFPCapable: LD 00 disabled reason LD properties
03/13/18  3:25:30: C0:ldIsFPCapable: LD 01 disabled reason LD properties
03/13/18  3:25:30: C0:ld sync: all LDs sync'd

Thanks