DMX 3 architecture and I/O operation

Hello All,

I know this is going to be a very basic question , but it will be nice if you guys can help me understand how symmetrix functions?

Basically , I am looking at the architecture of symmetrix DMX3 Model and want to understand the I/O operation in these devices.

I have more exposure to celerra and Clariion , but i need to manage the DMX and VMAX boxes as well so I felt this to be the right place.

Any Document and little explanation will help!

Thank you all for the time !