VMAX FA ports

Got a question regarding the redesign of the FE/FA ports on the vmax3.  These ports historically had 1 ASIC per dir port with port 0 & 1.  Typically, a practice I'd use on a balanced array approach was to isolate these to eliminate ASIC contention, up to a point if indeed that point came (rarely did..) where additional ports were needed.  I'd put Port 0 on Even Fabric Cores and Port 1 on odd (this completely eliminate ASIC contention.

I'd then create vmax port groups (12 of them) each with staggered FA ports across directors.  I then instructed the datacenter team to cable up only the ports I specified. Then when the provisioning folks needed to provision, they were instructed to use 1 of the 12 4 port groups after checking utilization across PGs.

My question is, with the redesign of the FE slice and cpus, are the Ports still sharing common asics at the hardware level?  Or has the introduction of the pool of CPUs now handle all of what the director ASICs used to?

Thanks,

Tom