In the two-bay
chassis configuration that supports up to two full-width compute sleds,
a compute sled is mapped to four ports on each I/O module.Figure 1. I/O module port
mapping—full-width compute sleds
The following
table lists the compute sleds and the ports to which they are mapped.
Table 1. I/O module port
mapping—full-width compute sledsIn a two-bay chassis, the full-width compute sled
populated in bay 1 is mapped to ports 1, 2, 3, 4 on both I/O Module
A1 (Top) and I/O Module A2 (Bottom). In a two-bay chassis, the full-width
compute sled populated in bay 3 is mapped to ports 5, 6, 7, 8 on both
I/O Module A1 (Top) and I/O Module A2 (Bottom).
Compute sled
I/O Module A1 (Top)
I/O Module A2 (Bottom)
1
1, 2, 3, 4
1, 2, 3, 4
3
5, 6, 7, 8
5, 6, 7, 8
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