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Dell PowerEdge FX2 and FX2s Enclosure Owner's Manual

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I/O module port mapping—three-bay chassis

The three-bay chassis supports a combination of one full-width compute sled and up to two half-width compute sleds.

In the three-bay chassis, a full-width compute sled is mapped to four ports on each I/O module. A half-width compute sled with quad port NDC is mapped to two ports on each I/O module.

NOTE: A half-width compute sled with dual-port NDC is mapped to a single port on each I/O module.
NOTE: In the three-bay PowerEdge FX2s configuration that supports storage sled(s) mapped to a full-width compute sled, only the compute sled is mapped to the I/O module ports. If storage sleds are installed, the corresponding ports on the I/O modules mapped to these slots are not active.
Figure 1. I/O module port mapping—three-bay chassis
This figure shows the I/O module port mapping in a three-bay chassis.

The following table lists the compute sleds and the ports to which they are mapped.

Table 1. I/O module port mapping in three-bay chassisIn a three-bay chassis, the full-width compute sled populated in bay 1 is mapped to ports 1, 2, 3, 4 on both I/O Module A1 (Top) and I/O Module A2 (Bottom). In a three-bay chassis, the half-width compute sled with quad-port NDC populated in bay 3 is mapped to ports 5, 6 on both I/O Module A1 (Top) and I/O Module A2 (Bottom). In a three-bay chassis, the half-width compute sled with dual-port NDC populated in bay 3 is mapped to port 5 on both I/O Module A1 (Top) and I/O Module A2 (Bottom). In a three-bay chassis, the half-width compute sled with quad-port NDC populated in bay 4 is mapped to ports 7, 8 on both I/O Module A1 (Top) and I/O Module A2 (Bottom). In a three-bay chassis, the half-width compute sled with dual-port NDC populated in bay 4 is mapped to port 7 on both I/O Module A1 (Top) and I/O Module A2 (Bottom).
Compute sledIO Module A1 (Top)IO Module A2 (Bottom)
11, 2, 3, 41, 2, 3, 4
35, 6 (for half-width compute sled with quad-port NDC)

5 (for half-width compute sled with dual-port NDC)

5, 6 (for half-width compute sled with quad-port NDC)

5 (for half-width compute sled with dual-port NDC)

47, 8 (for half-width compute sled with quad-port NDC)

7 (for half-width compute sled with dual-port NDC)

7, 8 (for half-width compute sled with quad-port NDC)

7 (for half-width compute sled with dual-port NDC)

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