PowerEdge: Understanding FLOP CPLD and FPGA Firmware in 17th Generation Servers
Summary: In the world of technology, it is not uncommon to come across unfamiliar terms and acronyms. 17th Generation Servers introduce the Floating OCP Paddle Card (FLOP) Complex Programmable Logic Device (CPLD) and Field-Programmable Gate Array (FPGA) terminology. ...
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Instructions
What is FLOP?
FLOP stands for Floating OCP Paddle Card.
What is FLOP CPLD?
FLOP CPLD refers to the firmware that is used on the paddle board for Open Compute Project (OCP) cards. This firmware is required for front-facing OCP cards and optional second rear OCP cards (also mounted on paddle boards). This firmware is used to control the power sequence of OCP cards that are mounted on paddle boards.
FLOP CPLD firmware is not applicable for OCP cards mounted directly to the Host Processor Module (HPM). Optional front-facing and rear OCP cards are not mounted directly to the HPM. These adapters are attached to a paddle board that is cabled to the HPM.
FLOP CPLD firmware is strictly for paddle boards.
Note: FLOP CPLD has nothing to do with traditional Complex Programmable Logic Device (CPLD) firmware found on 16th generation and older PowerEdge Servers.
What is FPGA?
FPGA stands for Field-Programmable Gate Array. It is a type of integrated circuit that can be programmed and reprogrammed after manufacturing. In this context, FPGA is similar to traditional CPLD.
How does FPGA relate to CPLD?
In this case, FPGA is used to merge the firmware of three separate Programmable Logic Device (PLD) Integrated Circuits (ICs) into a single package. These ICs are:
What is FPGA?
FPGA stands for Field-Programmable Gate Array. It is a type of integrated circuit that can be programmed and reprogrammed after manufacturing. In this context, FPGA is similar to traditional CPLD.
How does FPGA relate to CPLD?
In this case, FPGA is used to merge the firmware of three separate Programmable Logic Device (PLD) Integrated Circuits (ICs) into a single package. These ICs are:
- SCM FPGA (located on the DCSCM board)
- HPM FPGA (located on the HPM board)
- SAT FPGA (located on the HPM board)
The firmware for these three PLDs is combined into a single FPGA firmware package, which is updated using a single Dell Update Package (DUP). This means that instead of having separate firmware updates for each PLD, there is only one update package that covers all three. The numbering in the firmware version reflects the three PLDs of the firmware. For example, FPGA version 107.123.120 for an R6715 breaks out into the following:
- SCM version 1.0.7
- HPM version 1.2.3
- SAT version 1.2.0
Summary:
- FLOP refers to the OCP paddle board.
- FLOP CPLD is the firmware used on the paddle board for OCP cards.
- FPGA is a Field-Programmable Gate Array that is used to merge the firmware of multiple PLDs into a single package.
Affected Products
PowerEdge R470, PowerEdge R570, PowerEdge R670, PowerEdge R6715, PowerEdge R6725, PowerEdge R770, PowerEdge R770AP, PowerEdge R7715, PowerEdge R7725, PowerEdge R7725xdArticle Properties
Article Number: 000379385
Article Type: How To
Last Modified: 25 Mar 2026
Version: 4
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