Data Domain：DD9800 - 電壓故障 - 警示

由於重疊的點陣圖項目，當真正的問題是 CPU 外部 IERR 時，DD9800 修訂 2 可能會因為「電壓故障」而指控 SP。
當兩個事件 （CPU 外部 IERR 和「電壓故障」） 同時發生時，可以安全地忽略電壓警示，並將故障診斷重點放在 CPU 遇到 CPU IERR 的原因上。如需有關故障診斷 DD9800 平台上 CPU IERR 錯誤的更多詳細資料，請聯絡您的支援提供者以取得協助。

受影響的系統：
- DD9800 修訂版 2
- DDOS 5.7.x / 6.0.x / <6.1.3.0

症狀：

已發佈警示
=========

Time: Tue Mar 27 07:19:53 2018 Alert Id: p0-57 Event Id: EVT-ENVIRONMENT-00032 Event Message: The storage processor has failed Object: Enclosure=1 Additional Information: Cause=Voltage is faulty "Voltage is faulty" event found in messages.engineering log =============================================== Mar 15 05:48:27 platmon: CRITICAL: The storage processor has failed. Enclosure=1 Cause="Voltage is faulty" Mar 15 05:48:28 platmon: INFO: Event posted: p0-275 (11000113:28521xxxx): EVT-ENVIRONMENT-00032: The storage processor has failed EVT-OBJ::Enclosure=1 EVT-INFO::Cause=Voltage is faulty Mar 15 05:48:28 platmon: INFO: _ems_post_pubsub_event: Publishing event for alert EVT-ENVIRONMENT-00032

CPU IERR event found in bios.txt log =============================== 1 | 03/15/2018 | 05:33:39 | SMI Critical Interrupt Events Enter_SMI | SMI Critical Interrupt | Asserted | Used AUX Log (LSB 0x0) Used AUX Log (MSB 0x0) 2 | 03/15/2018 | 05:33:41 | CPU Status Events CPU2_Status | CPU IERR | Asserted | CPU External IERR 3 | 03/15/2018 | 05:33:41 | Entering IERR Interrupt Events Enter_SMI | IERR Interrupt | Asserted | Used AUX Log (LSB 0x24) Used AUX Log (MSB 0x0) 4 | 03/15/2018 | 05:33:42 | BMC Chassis Ctrl Events BMC_Chassis_Ctrl | Reset through BMC | Asserted 5 | 03/15/2018 | 05:34:04 | Power Unit DC_State | State Asserted | Deasserted

在 DDOS 版本 5.7、6.0 和 6.1 中發現此問題

根本原因是 SP 故障點陣圖重疊，因此當發生 IERR 事件時，警告訊息會錯誤地顯示「電壓故障」

#define  APL_FRU_FAULT_SP_CPUMISC       (1 << 17)
#define   APL_FRU_FAILEDMAP_VOLTFAULT_SP    (1 << 17)