Scroll down to figure 3-2 on this page. It shows how to put 32GB in this system. There are some major differences (you can't just add the 2 DIMMS and leave the rest alone as you're having to revert from triple channel to just dual channel (put 2 DIMMs in each of the 2 channels instead of 1 in each of the 3 channels).
That is the diagram I have been using. The problem is that I have to either put both new strips in one channel, or one in each (A & B)
When I use the following configuration:
CD0 CD0 000 CPU1 CPU2 000 0DD 0DD
I get the BIOS error "Unsupported configuration, DIMM configuration on each CPU should match" - and have to press F1/F2, the systems starts but is unstable (shuts down irregularly).
If I use the following configuration:
CD0 DD0 000 CPU1 CPU2 000 0DD 0DC
I get the BIOS error "Unsupported configuration, DIMM mismatch, the following should match in geometry A1 & A2, B1 & B2"
Dev Mgr
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9.3K Posts
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January 24th, 2011 13:00
Scroll down to figure 3-2 on this page. It shows how to put 32GB in this system. There are some major differences (you can't just add the 2 DIMMS and leave the rest alone as you're having to revert from triple channel to just dual channel (put 2 DIMMs in each of the 2 channels instead of 1 in each of the 3 channels).
adam.d
2 Posts
0
January 25th, 2011 00:00
Hi - thanks for the reply.
That is the diagram I have been using. The problem is that I have to either put both new strips in one channel, or one in each (A & B)
When I use the following configuration:
CD0 CD0 000 CPU1 CPU2 000 0DD 0DD
I get the BIOS error "Unsupported configuration, DIMM configuration on each CPU should match" - and have to press F1/F2, the systems starts but is unstable (shuts down irregularly).
If I use the following configuration:
CD0 DD0 000 CPU1 CPU2 000 0DD 0DC
I get the BIOS error "Unsupported configuration, DIMM mismatch, the following should match in geometry A1 & A2, B1 & B2"
So I am stumped, could it be dodgy memory?
veltech
61 Posts
0
January 26th, 2011 08:00
Try this configuration
DC0 D00 D00 CPU1 CPU2 00D 00D 0CD
The Nehalem processors prefer to have all 3 memory channels filled per proc