Hello,

This is mainly a feedbaack thread for Dell:

i've just downloaded the technical guidebooks for the R720 and T620 and i'm somewhat let down by the lack of in-depth technical info a book like this should show(they look more like overviews).

I open the R710, T710 or T610 technical guidebooks and they're PROPER guidebooks with all the info.

Some crucial info i find lacking in the new manuals that i require clarification or enhancement:

1. No block diagram: in the T710 guidebook the block diagram has proven invaluable for sizing this server in several solutions as it allowed me to see where EVERY bit of i/o is routed as well as the BW for each route.
2. No detailed photos with info on the insides: on the old manuals you had internal detailed photos with colored sections and info arrows pointing at WHAT is every notable device on the planar/case
3. No detailed tech info for the chipset: there's virtually no info on the C600 chipset, on the old manuals you had dretails like pcie lane count, grouping, what connected to those/connectors, how they connect to the CPUs at what bandwidth, how many chipsets are there, etc, same as for the CPUs
   There's also no mention of the latency penalty on using LRDIMM and it's highly unclear when it's advantageous to use LRDIMM over RDIMM
4. No details on pcie layout for devices: I had to download the R720 owners manual JUST to discovert the new PERC Hx10 is in a propietary daughtercard format! , and i don't even know if it's like that on the rest of the series(does the T620/720 also use this format or a regular card one?) because of 2 and 1 -no detailed photos or block diagram-, how is this OMMITED in a TECHNICAL guidebook?
   There's also no mention of the BW/lanes/where is the NDC/LOM is connected to, simply no info anywhere, the old guidebooks had detailed techspecs for the NIC controllers, all i could find in the new ones is a high-level feature table, not specifics like bus width and type.
   also, for the Intel X540 it's mentioned as 2x10Gbe + 2x1Gbe, HOW?, the Intel X540 only has 2x10Gbe with x8 pcie 2.0 interface, where do the extra 2x1Gb ports come from?, is it using a second NIC chip and a pcie switch?, or the NDC module is a full x16 lane connecotr?... lot of stuff in the dark...
   Weird not documented inconsistencies: each SNB xeon has 40 pcie3 lanes and they don't expose QPI to chipset, R720 has those 40 lanes routed to the pcie slots(3x8 1x16 for each socket), where do the NDC/NICs connect to then?, how many lanes?, at what version?, same for the PERC!.
   Where did Dell pull out those extra lanes from?
   It's even worse on the T620: 4x16, 2x8, 1x4 = 84 lanes, two sockets max=80 lanes, how did they pull out alll the extra pcie lanes needed?, and it says only socket 1 to 4 are available with one CPU... but WHAT SLOTS ARE THOSE?, there's no mention of which number slot corresponds to which lane width AT ALL!, you need to download the owners manual which is again -counterproductive and meaningless, old TECH manuals had it-

So for now there it is, i'd like for Dell to mend the new manuals and actually make them like the T710 guidebook that was one of the best i've seen -specially the block diagram that was missing from a lot of the RX10 series-.

For now at least i'd like a detailed answer/block diagram for the points i've put above, i simply can't configure a system for a customer not knowing crucial info like this and i don't like to receive nasty bottleneck surprises, there's a lot of very important info missing/obscured/vaguely commented that shouldn't be like that in any case.

Regards