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May 6th, 2019 13:00

Demystifying Dell WD19TB supported display resolutions

A while ago I wrote a “Demystifying USB-C and Thunderbolt” thread here, which addressed how USB-C and Thunderbolt worked, including in docking station scenarios, and how that related to supported display setups.  Since then, Dell has released the WD19 dock family that includes support for the newer HBR3 standard, and the WD19TB dock in particular has some limitations on maximum resolutions with various display output combinations that might seem strange.  So I decided to write this thread for anyone who was simply curious from a technical perspective about why those exist.

First of all, it’s important to note that although the WD19 dock family can take advantage of HBR3 support (DisplayPort 1.3 or 1.4) if the system has it available through its USB-C/TB3 port, the vast majority of systems on the market here in May 2019 still only support HBR2, for the simple reason that Intel GPUs today still only support HBR2 (DisplayPort 1.2). Even among systems that also have discrete NVIDIA/AMD GPUs, the USB-C/TB3 port is often still physically wired to the Intel GPU and is therefore subject to its limitations -- so at the moment, the only systems that have HBR3 support on USB-C/TB3 are those that have those ports driven directly by a discrete GPU.  However, Intel’s upcoming “Ice Lake” family of CPUs will incorporate a new GPU that supports DisplayPort 1.4 and therefore HBR3.  Those CPUs are slated to begin arriving in late 2019, as of this writing.

The main focus of this thread, however, is that the WD19TB has altered how it allocates display bandwidth to its various outputs compared to the TB16 that it replaces. That’s why if you look at the manual’s Display Resolution Table for a Thunderbolt system, you’ll find some limitations that might seem unintuitive or arbitrary. For example, when using an HBR2 system, running dual 4K 60 Hz displays requires that one of them be connected to the dock’s “downstream” Thunderbolt port, a limitation that didn’t exist on the older TB16 dock. But on an HBR3 system, that same Thunderbolt 3 port is limited to just QHD resolution whenever any other output is also in use. So what’s going on here?

There are two underlying causes for these limitations. The simple one is that the WD19 simply doesn’t support using its HDMI port and USB-C port for video output at the same time (although using the latter for a data device while using HDMI for video seems to be fine.) The second and much less obvious reason is that the WD19 family only allocates 4 of the incoming HBR lanes from the system to be shared across all of its “core” display outputs, i.e. all outputs except the Thunderbolt 3 port built into the removable attachment module. Any remaining HBR lanes coming from the system are only available to that Thunderbolt 3 port, regardless of whether it’s actually being used.  This ends up accounting for both of the unintuitive and seemingly contradictory limitations relating to the Thunderbolt 3 port I mentioned earlier.

For the HBR2 system scenario, on a system that has two GPU outputs wired to its Thunderbolt 3 port (which to my knowledge all Dell systems have), an HBR2 connection over TB3 includes 8 HBR lanes, since a full DisplayPort link has always been defined as 4 HBR lanes, even before USB-C/TB3 arrived.  But since the “core” display outputs only have access to half of those, which is equivalent to the bandwidth of a single full DisplayPort 1.2 link, you can only use those ports for display setups that fall within those bandwidth limits.  That’s why even though the system is providing enough total bandwidth for dual 4K 60 Hz displays, for example, you’re limited to QHD if you want both displays on “core” outputs.  However, if you instead connect only one display to a “core” port and the other to the Thunderbolt 3 port where the other 4 lanes are available, you can run dual 4K 60 Hz just fine.

For the HBR3 system scenario, there are at most 5 lanes coming from the system. The reason for this is that two full DisplayPort connections (i.e. 8 lanes) at HBR3 would require 64.8 Gbps of bandwidth, which is well beyond the 40 Gbps of Thunderbolt 3, and that’s before even considering any non-display data you might want to send across your Thunderbolt 3 connection to the dock, such as USB data for external hard drives, Ethernet data, etc. (If you're wondering, Thunderbolt 3 always prioritizes display traffic and throttles everything else when there isn't enough bandwidth to run everything at max performance. However, Thunderbolt 3 supports 40 Gbps in each direction simultaneously, and display traffic only ever runs one way, so depending on what else you're doing, high-bandwidth display setups might not bottleneck you.)  In an HBR3 scenario where only 5 lanes are available, the first 4 get allocated to the “core” outputs, and then the Thunderbolt 3 port only gets access to that single remaining HBR3 lane – which is why it’s limited to QHD.  The only exception seems to be if the Thunderbolt 3 port is the only one being used for display traffic, in which case it gets access to all 5 lanes, since the manual specifies that a single 8K 30 Hz display can be used from that port, just like all other ports.

One question not addressed by the manual is whether the dock supports DisplayPort DSC, i.e. Display Stream Compression. That’s part of the DisplayPort 1.4 spec, but I don’t know if it’s mandatory. But if the system and dock both support it, then higher-end display setups than indicated in the manual would be possible -- OR a given display setup would require less bandwidth, which would especially benefit Thunderbolt 3 connections because that would open up more bandwidth for other traffic.  (On regular USB-C, currently half of the high speed lanes are allocated to video and half are allocated to USB, so reducing display bandwidth consumption doesn't benefit USB traffic -- although USB4 will be changing that to allow dynamic bandwidth allocation.) The higher-end display setup option could potentially even be achievable if the displays themselves didn’t support DSC as long the WD19 could “decompress” the DSC signal from the system and output a standard DisplayPort 1.4 signal to the attached display(s). And if the attached displays DID support DSC, then assuming all of the aforementioned support was still in place, even the maximum per-display resolution would increase, because at that point even the "normal" constraints on the DisplayPort 1.4 link between the dock and display could be exceeded.  Hopefully we’ll find out through some testing once suitable systems and displays are more widely available.

14K Posts

28-12-2020 22:00 PM

@gentoo9ball  Well that’s certainly disappointing. Based on that setup with all displays driven by the Intel GPU, you wouldn’t be able to run quad displays even if the Intel GPU actually DID support DP 1.4, because Intel GPUs are still limited to 3 simultaneous independent displays, even the new ones that support DP 1.4 — and that limitation always applies regardless of how they’re connected, how much bandwidth is available, how much bandwidth the displays require, etc. In your case, the only way to run more than 3 total displays would be to run at least one of them through “indirect display” technology like DisplayLink — not to be confused with DisplayPort. There are single display USB dongles that use DisplayLink and docking stations that support multiple displays driven via DisplayLink — like the Dell D6000. But DisplayLink has some drawbacks that can be significant in some use cases. I wrote about those in the post marked as the answer in this thread.

If those aren’t acceptable, then unfortunately you’ve got the wrong laptop for your purposes. Dell doesn’t make very many laptops that have display outputs wired to the NVIDIA GPU. The Precision 7000 Series systems have a BIOS option allowing you to choose which GPU controls the built-in display as well as the display outputs, but they’re of course larger, heavier, and more expensive. The XPS 17 9700 and I believe its sister system the Precision 5750 have this type of option only if you order it with an NVIDIA RTX GPU, not a GTX (or non-RTX Quadro) GPU. And some gaming-oriented systems have at least one display output connector wired to the NVIDIA GPU to support certain features that don’t work when running through an Intel GPU, like VR or G-Sync. Other than that, this capability seems to be more commonly found on Lenovo systems. I myself have an X1 Extreme Gen 2, which is the only real non-Apple competitor to the XPS 15 (at least before the XPS 15 went purely USB-C). On that system, the built-in display is controlled by the Intel GPU, but a BIOS option allows it to be controlled by the NVIDIA GPU — but all of the display outputs are always controlled by the NVIDIA GPU. In the default mode with the Intel GPU still running the built-in display, I can actually run 5 total displays, i.e. the built-in display and 4 external displays (the max for the NVIDIA GPU). It’s not officially supported, probably because there’s a pretty narrow set of ways that this setup can be achieved due to considerations around bandwidth, ports, and GPU interfaces allocated to those ports, but I managed it with the help of a Thunderbolt dock. I had two external QHD displays, two external FHD displays, and the built-in FHD display all running simultaneously.

15 Posts

07-01-2023 16:00 PM

I do get your point, but to be fear, if I keep 1 as dword value (disabled) 4K60 using USB C as I mentioned before... So it might be actually doing some tweak.

19 Posts

23-07-2019 12:00 PM

I just replaced my awful TB16 with a WD19TB hoping that my persistent problem would go away and it hasn't.

My setup: Lat 7480 i7-7660U (2560x1440 touch), WD19TB, U3415W monitor (3440x1440) via DP cable.

Symptoms: Often, usually when scrolling or watching a video on either screen, the external monitor will go blank for 0.5 - 2.0 seconds. This happens everywhere from occasionally, to almost continuously. If the video is on the built-in monitor, it will continue to play, but I can't hear anything as the audio plays through the monitor.

None of the monitored parameters in Task Manager is over 50%. No messages seem to be generated in Event Viewer. I don't see any Thunderbolt messages or logs. Support Assist says everything is up to date.

TB16 has exact same symptoms. If I plug the monitor in to the laptop directly with an HDMI cable everything works fine, but then what's the point of the dock?

1 Message

13-09-2019 06:00 AM

Did you update the Thunderbolt Firmware and Controller drivers on your laptop?

1 Message

03-11-2019 10:00 AM

Here are some excerpts from WD19TB's manual:

HBR2 is DP 1.2 (5.4 Gbps maximum link rate per lane). With DP overhead, the effective data rate is 4.3 Gbps per lane.
1x FHD (1920 x 1080) display @60 Hz - 3.2 Gbps
1x QHD (2560 x 1440) display @60 Hz - 5.6 Gbps
1x 4K (3840 x 2160) display @30 Hz - 6.2 Gbps
1x 4K (3840 x 2160) display @60 Hz - 12.5 Gbps

I've done some math and according to my calculations:

4 lanes (5.4 Gbps per link) = 4x5.4 Gbps (4x4.3 Gbps effectively) = 17.2 Gbps (for "core" display outputs)

2x 4K 60Hz = 2x 12.5 Gbps = 25 Gbps so it definitely excess "core" display outputs limit


3x QHD 60Hz = 3x 5.6 Gbps = 16.8 Gbps is still below 17.2 Gbps

Why according to manual, connecting 3x QHD to DP1.4 + DP1.4 + HDMI2.0 is not possible?

Correct me if I'm wrong.

14K Posts

03-11-2019 11:00 AM

@LiuCAsyour math appears to be correct.  I know that at least in the past, the actual bandwidth requirements of a given resolution could vary a bit based on the design of the display.  For example, I remember that back in the DVI days, not all displays supported "reduced blanking" in order to reduce bandwidth requirements.  But to your question, given that the available bandwidth is only slightly higher than the math suggests is required, there might be some additional overhead on the link from running DisplayPort MST that might cause the effective bandwidth requirements to be greater than the basic math would indicate and therefore too much to run 3x QHD on the main outputs.  Or there might be some other aspect of the dock's design that prevents it.  Or the manual might be wrong and it might in fact be possible to run three of at least certain QHD display models all from those core outputs.  I don't have a WD19TB or three QHD displays to test that setup on my own.  Additionally, what I wrote in my original post here is my educated guess as to how the dock works based on the restrictions I found in the manual and my overall understanding of how DisplayPort works.  But I have no confirmation from any official source that what I wrote is actually correct.

14K Posts

03-11-2019 11:00 AM

@LiuCAs  in addition to my reply above, I'll note that I've never seen a DisplayPort 1.2/HBR2 interface that's able to run triple QHD displays, even without a dock involved.  If you look at information around DisplayPort MST, which can be used through MST hubs or through displays that have built-in support for daisy-chaining, you'll see that allowed display configurations when using DisplayPort 1.2/HBR2 include up to 5x 1680x1050, 4x 1920x1080, or 2x 2560x1440.  On an HBR2 system, the core outputs only get a single full DisplayPort 1.2/HBR2 interface, just as an MST or daisy-chain setup would have.  So I guess another possibility is that the bandwidth requirement for QHD printed in the WD19TB's manual is incorrect.  But the dual QHD max for a single DisplayPort 1.2/HBR2 link (i.e. 4 lanes) is not unique to this dock.

10-11-2019 05:00 AM

How can TB3 support 8 lanes of HBR2 DP signals? I mean if you look at USB-C alt mode it seems that pins are only enough to support 4 lanes. is that right? where the other 4 additional lanes come from in terms of pin mapping?
Another doubt, newest intel Titan Ridge controller supports only 4 lanes of HBR3 (as reported on the datasheet) but why everyone reports dual DP1.4 connection as part of Titan Ridge? THis should not be the case right?

14K Posts

10-11-2019 06:00 AM

@masimilianzo  you might want to the thread I linked at the very beginning of my first post (here it is again), since I explained the answer to your first question.  Essentially, Thunderbolt 3 is itself an Alt Mode, and when a USB-C cable is used for Thunderbolt 3, its four high speed lanes are all configured to carry a Thunderbolt signal, which is a multiplexed signal of both PCIe and DisplayPort traffic.  The Thunderbolt 3 controller on the other end demultiplexes that.  It is indeed possible to carry 8 lanes of HBR2 because it is possible to run dual 4K 60 Hz displays over Thunderbolt 3, and that's how it's done.  In this setup, individual HBR lanes do not get their own high-speed lanes in the USB-C cable as they do with regular DP Alt Mode, in fact the USB-C lanes aren't even statically assigned between PCIe and DisplayPort traffic.  This dynamic bandwidth allocation is actually why Thunderbolt is more flexible than a USB 3.x + DisplayPort Alt Mode configuration where you only have 2 HBR lanes even if you're not actually using very much USB 3.0 bandwidth.  USB4 is going to adopt this dynamic setup so that bandwidth unused by one type of traffic will be available for other kinds of traffic rather than having lanes dedicated to a type of traffic that doesn't need always need it.

For HBR3, I'm not sure what datasheet you're referring to, but Thunderbolt 3 only mandates that a single DisplayPort link (4 lanes) be wired to the controller, with an option to have two links (8 lanes).  So that might be why the datasheet you're looking at only indicates 4 lanes.  But Thunderbolt 3 has the bandwidth to carry 5 lanes of HBR3, which technically is two connections.  It's not two FULL connections, but it's two independent connections coming from the GPU, and that can matter for systems that don't support DisplayPort MST, like Mac OS as of this writing.  The only way to run dual displays over Thunderbolt 3 on a Mac is if each display is running from its own DisplayPort link.  So with HBR3, one of the displays would have to fit within a single HBR3 lane unless Apple makes an improvement here.

10-11-2019 06:00 AM

Here's the datasheet:

You can see that it lists only 4 HBR3 lanes.

So you are saying that even if it uses USB-C physical interface, the DP port signals will be run through TB3 and thus it will possible to have 8 lanes.
Cool, but then are we agreeing that with USB DP Alt Mode you can only have 4 lanes of DP right?

Thanks for clarification.
It means that Apple XDR Display is divided internally in two tiles:
One fed by 4 lanes of HBR3
The other one feb just by 1 lane of HBR3.
Do not know if this means Apple has a custom TB3 controller for this (since the datasheet I linked only reports 4 HBR3 lanes)

14K Posts

10-11-2019 07:00 AM

@masimilianzo  it's not the case that "all other systems" only piped 4 HBR2 lanes through TB3.  Many systems, including all Thunderbolt 3-equipped Dell systems to my knowledge, have always had 8 HBR2 lanes available over TB3, as evidenced by the fact that they can run dual 4K 60 Hz displays.  There are certainly some systems that only have 4 lanes available, but Apple is not unique in offering 8 HBR2 lanes over TB3.

However, there is a separate limitation related to Intel GPUs, which is that they cannot combine multiple DisplayPort links to run a single display.  You can run multiple displays through a single link via DisplayPort MST, but you can't aggregate links (4-lane interfaces) to run a single display.  NVIDIA GPUs are able to do this.  This limitation comes into play with 5K displays that use dual physical DisplayPort inputs rather than Thunderbolt 3, such as a Dell 27" 5K display from a while ago.  Despite using multiple DisplayPort links, it does NOT present itself as a tiled display.  When connected, it signals to the GPU that it is in fact a single display, so Windows Display Settings only show one display -- but the GPU has to support this, and again current Intel GPUs do not.  I've never used the LG UltraFine 5K, so I don't know if it uses and relies on this technique or if it really does appear in the system as two physically separate displays, i.e. a "true" tiled display.  The major annoyance with the latter setup is that if the GPU thinks it's running two physically independent displays when there's only one physical display, you get all sorts of weird behavior.  For example, dialog boxes designed to appear in the center of the display would appear centered in one of the tiles, and clicking "Full Screen" while playing a video would cause it to appear full screen only on that tile.  Other techniques such as Aero Snap on the Windows side wouldn't work as expected either.  Do people who use the UltraFine 5K have to put up with these types of quirks?  If not, then it's operating like the Dell 27" 5K display I described earlier, and in that case the compatibility limitation was the link aggregation support I mentioned earlier, not an insufficient number of lanes.

As for the HBR3 question, now I remember where I got the 5 HBR3 lanes figure. Pages 22-23 of the manual for the WD19TB (here), which after all is the subject of this thread, indicates that when a Thunderbolt system that supports HBR3, the available bandwidth is "HBR3 x4 + HBR3 x1 -- 32.4 Gbps". I admit that I don't know how to reconcile the difference between that and the datasheet you found. I can't immediately think of an explanation that would allow both of those documents to be correct. I'll see what I can find though.

10-11-2019 07:00 AM

So there are Dell systems that work with Apple's UltraFine 5K display?

Thanks for the clarification on tiled display. Apple displays do not have those problem so they signal like a single panel to GPU for sure.
So do you think the updated Apple 5K display (with Titan Ridge) can be driven no problem by something like a Surface Pro 7 (it has Ice Lake GPU with DP1.4 support and this page reports max single monitor resoltuion to be 5K 60 Hz

Do you think it would be useful to ask Intel support about difference in 4 vs 5 lanes HBR3?

14K Posts

10-11-2019 07:00 AM

@masimilianzo  yes, regular USB DP Alt Mode maps one HBR lane to each high-speed lane within the USB-C cable.  With Thunderbolt, PCIe and DisplayPort traffic run through the Thunderbolt controller and are multiplexed there before being sent across the cable.

I would be careful about making assumptions about the XDR display.  I would be very surprised if they designed it to be a tiled display, since that's a very rare setup and sounds very "un-Apple".  And if you're correct that it requires 5 lanes of HBR3 and that the Thunderbolt controller will only send 4 (neither of which I'm certain about at the moment), then I would expect each display to require two Thunderbolt connections to the system, and that doesn't seem to be the case.  I think it's much more likely that Apple has implemented DisplayPort DSC, since that would allow all of its bandwidth requirements (both display and USB 3.x traffic from its built-in ports) to be met over a single Thunderbolt link, without resorting to dual connections or a custom Thunderbolt controller.

I'll keep looking into the HBR3 lanes question because if there are in fact only 4 lanes available, that doesn't seem to account for how the WD19TB works with an HBR3 system.

10-11-2019 07:00 AM

The first LG UltraFine 5K display was tiled (it only worked with Macs because it needed 2xDP1.2 piped through TB3 while all others systems only piped 4HBR2 lanes through TB3).

They updated it with Titan Ridge, so do not know if it is now single tile (the 13" MBP still only has DP1.2 capabilities so still needs 2 tiles to drive that display).
So I think Pro XDR display could be tiled no problem. It needs 36Gbps (60Hz, 8bpc) to be driven so yes 5 HBR3 lanes.
I strongly suspect that Apple's TB3 controller can send 5 lanes HBR3 signals (do not know if it is intel standard one or Apple has a custom one now that TB standard is open). Maybe better to ask Intel directly about number of HBR3 lanes? The un-Apple thing would be to use DSC in my opinion

14K Posts

10-11-2019 08:00 AM

My guess is that if the UltraFine does not have the typical tiling issues I just described, then unless the UltraFine has been updated to support HBR3, it wouldn’t work with any system where the output was driven by the Intel GPU, despite that spec listing you found. The new Intel “Ice Lake” CPUs, which are SOME of the Core 10th Gen CPUs, have a new Gen 11 GPU that supports HBR3. That’s why they can support 5K resolution even though they don’t support aggregating multiple links to drive a single display — because a single HBR3 link (4 lanes) is enough for 5K. However, if the UltraFine doesn’t support HBR3, then even that new Intel GPU would have to fall back to HBR2, in which case I expect the link aggregation limitation would prevent it from working properly. If the UltraFine was a true tiled display with all of the frustrations that come with that, then even previous Intel GPUs would be able to run it over Thunderbolt 3 with HBR2 on a system that had 8 lanes wired to the TB3 controller, because each half of a 5K display would fit within the bandwidth of an HBR2 link — but that’s not the case, and then you have all of those frustrations.

So the fact that the new Intel Gen 11 GPUs support 5K resolution doesn’t mean they support every 5K display implementation on the market. This type of confusing/inconsistent support also existed in the early days of 4K resolution, where there were 4K MST and 4K SST displays, and some systems would only support one but not the other. 4K MST was the true tiled approach, but some systems didn’t support MST very well or at all. The newer 4K SST was better because it was a single tile implementation, but those displays didn’t work with older Intel GPUs that had a sub-4K maximum per-display resolution — even though some of those GPUs could run a 4K MST display just fine.

My money is still on DisplayPort DSC for the XDR display though. If it is in fact visually lossless as VESA promises, implementing they standard that’s existed for a while is much simpler than designing a custom TB3 controller and then making the display only compatible with systems that have that controller on their end. DSC will also keep more bandwidth free on the Thunderbolt bus to support any upstream USB/TB3 peripherals users would plug into the display. If you max out the TB3 bus on display bandwidth alone, those peripherals will perform terribly. But hopefully we’ll find out when someone like AnandTech publishes a deep dive article about the display.

You can certainly ask Intel Support, although based on what I’ve read about them and my own limited experience with them, I wouldn’t count on a quality answer to a technical question like this. Although in fairness, Dell Support doesn’t always have correct answers to very technical questions either.

Anyhow, I’m happy to continue chatting via PM, but we’re now completely off-topic from the original purpose of this thread, so it might be better to continue this somewhere else.

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