PowerFlex: CPU Idle State Configuration Guidance
Summary: During multiple PowerFlex releases, the default CPU idle-state configuration has changed. This has introduced confusion for customers and field teams who are seeing differences between expected vs. deployed configurations. These variations often lead to unnecessary support cases or node configuration adjustments. ...
Instructions
Overview
Observed CPU idle-state configuration differs between nodes in the same cluster.
Tools or validation checks flag discrepancies that appear to violate best-practice performance settings. Also, a misinterpretation that differences indicate performance risk or misconfiguration.
Technical Details
PowerFlex controls CPU idle-state behavior using two boot loader parameters:
-
intel_idle.max_cstate
Value Behavior 1Prevents deeper CPU idle states using the intel_idle driver 0Disables intel_idle and defers to the ACPI driver Effective Result: Same restriction of deep idle states -
processor.max_cstate
Value Behavior 0or1Prevents deeper ACPI idle states Effective Result: No functional performance difference
These values restrict deep CPU sleep states, which can increase wake-up latency and cause I/O performance jitter.
Testing by PowerFlex Performance Engineering confirms that any combination of 0 or 1 for these two parameters results in equivalent behavior on PowerFlex systems.
Therefore, variations in observed settings do not imply performance degradation or configuration drift.
Validated Equivalent Combinations
All the following configurations conform to PowerFlex best practices:
No remediation is necessary when encountering any of the below configuration variations.
Combination #1 - intel_idle.max_cstate = 0 ; processor.max_cstate = 0
Combination #2 - intel_idle.max_cstate= 0 ; processor.max_cstate = 1
Combination #3 - intel_idle.max_cstate= 1 ; processor.max_cstate = 0
Combination #4 - intel_idle.max_cstate= 1 ; processor.max_cstate = 1
These settings are automatically applied during deployment using PowerFlex Manager.
They are validated during lifecycle operations by the SCR tool (vX.Y and above). Manual modification is not required unless SCR explicitly flags a non-conforming configuration.