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OverviewMemory Population TabThings To ConsiderGlossary

Each CPU has three integrated MCHs that have their own memory channel. Memory accesses can be interleaved across the CPU nodes, or the system can be configured in non-uniform memory architecture (NUMA). This is the default BIOS configuration setting from the factory.

Memory Optimized Mode
 
In this mode, the MCHs run independently of each other; for example, one can be idle, one can be performing a write operation, and the other can be preparing for a read operation. Memory may be installed in one, two, or three channels. To fully realize the performance benefit of the memory optimized mode, all three channels per CPU should be populated.To maximize performance it is better to add DIMMs across channels before adding more DIMMs to a channel that is already populated.
 
Max Bandwidth Performance
First bank fully populated with DDR3 1333Mhz per MCH
  • Max capacity 48GB (96GB Capacity can be reached with 16GB DIMMS, Memory Speed will be 1066MHz)
  • Must have Intel Xeon 5550 Series Processor and up
  • Two DIMMS Per Channel will be supported with BIOS Version 1.1.4

Max Bandwidth Performance

Balanced Performance
First & second banks fully populated with DDR3 1066Mhz per MCH
  • Max capacity 96GB (192GB Capacity can be reached with 16GB DIMMS, Memory Speed will be 800MHz)
  • Must have Intel Xeon 5520 Series Processor and up
  • Support for 1333MHz for first & second banks coming soon, requires Intel Xeon 5550 Series Processor and Up (Coming Soon)

Balanced Performance

Maximum Capacity
First, second & third banks fully populated with DDR3 800Mhz per MCH
  • Max capacity 144GB
  • Must have Intel Xeon 5500/5600 Series Processor and up

Maximum Capacity

Advanced ECC Mode
This RAS-memory mode uses two MCHs and “binds” them together to emulate a 128-bit data bus DIMM. This is primarily used to achieve a Single Device Data Correction (SDDC) for DIMMs based on x8 DRAM technology. SDDC is supported with x4 based DIMMs in every memory mode. One MCH is completely un-utilized, and any memory installed in this channel will generate a warning message during POST.
 
Mirror Mode
This RAS-memory mode uses two of the three channels. Identical data writes are performed on each channel, and reads alternate between the two channels. If excessive memory errors are detected on a channel, that channel is disabled and the system uses the other channel for future reads and writes. This is essentially a data backup, and allows the system to continue running even during a catastrophic DIMM failure on a channel. Since the memory is copied between DIMMs, the operating system will only see and report half of the installed memory.
 
Max Bandwidth Performance RAS
First bank fully populated with DDR3 1333Mhz per MCH (Only 2 MCHs can be utilized)
  • Max capacity 32GB (64GB Capacity can be reached with 16GB DIMMS, Memory Speed will be 1066MHz, must have Intel Xeon 5520 Series Processor and up)
  • Mirror Mode 16GB (32GB Capacity can be reached with 16GB DIMMS, Memory Speed will be 1066MHz, must have Intel Xeon 5520 Series Processor and up)
  • Must have Intel Xeon 5550 Series Processor and up
  • Two DIMMS Per Channel will be supported with BIOS Version 1.1.4

Max Bandwidth Performance RAS

Balanced Performance RAS
First & second banks fully populated with DDR3 1066Mhz per MCH (Only 2 MCHs can be utilized)
  • Max capacity 64GB (128GB Capacity can be reached with 16GB DIMMS, Memory Speed will be 800MHz, must have Intel Xeon 5500 Series Processor and up)
  • Mirror Mode 32GB (64GB Capacity can be reached with 16GB DIMMS, Memory Speed will be 1066MHz, must have Intel Xeon 5500 Series Processor and up)
  • Must have Intel Xeon 5550 Series Processor and up
  • Support for 1333MHz for first & second banks, requires Intel Xeon 5550 Series Processor and Up (Coming Soon)

Balanced Performance RAS

Maximum Capacity RAS
First, second & third banks fully populated with DDR3 800Mhz per MCH (Only 2 MCHs can be utilized)
  • Max capacity 96GB
  • Mirror Mode 48GB
  • Must have Intel Xeon 5500/5600 Series Processor and up

Maximum Capacity RAS

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