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Dell PowerEdge FX2 and FX2s Enclosure Owner's Manual

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I/O module port mapping—six-bay chassis

The six-bay chassis supports a combination of up to four quarter-width compute sleds and up to two half-width compute sleds.

In the six-bay chassis, a quarter-width compute sled is mapped to one port on each I/O module. A half-width compute sled with quad-port NDC is mapped to two ports on each I/O module.

NOTE: A half-width compute sled with dual-port NDC is mapped to a single port on each I/O module.
NOTE: In the six-bay PowerEdge FX2s configuration that supports storage sleds mapped to quarter-width compute sleds, the I/O module ports are mapped only to the compute sleds. If storage sleds are installed, the corresponding ports on the I/O modules mapped to these slots are not active.
Figure 1. I/O module port mapping—six-bay chassis
This figure shows the I/O module port mapping in a six-bay chassis.

The following table lists the compute sleds and the ports to which they are mapped.

Table 1. I/O module port mapping in a six-bay chassisIn a six-bay chassis, the quarter-width compute sled populated in bay 1a is mapped to port 1 on both IO Module A1 (Top) and IO Module A2 (Bottom). In a six-bay chassis, the quarter-width compute sled populated in bay 1b is mapped to port 2 on both IO Module A1 (Top) and IO Module A2 (Bottom). In a six-bay chassis, the quarter-width compute sled populated in bay 1c is mapped to port 3 on both IO Module A1 (Top) and IO Module A2 (Bottom). In a six-bay chassis, the quarter-width compute sled populated in bay 1d is mapped to port 4 on both IO Module A1 (Top) and IO Module A2 (Bottom). In a six-bay chassis, the half-width compute sled with quad-port NDC populated in bay 3 is mapped to ports 5,6 on both IO Module A1 (Top) and IO Module A2 (Bottom). In a six-bay chassis, the half-width compute sled with dual-port NDC populated in bay 3 is mapped to port 5 on both IO Module A1 (Top) and IO Module A2 (Bottom). In a six-bay chassis, the half-width compute sled with quad-port NDC populated in bay 4 is mapped to ports 7, 8 on both IO Module A1 (Top) and IO Module A2 (Bottom). In a six-bay chassis, the half-width compute sled with dual-port NDC populated in bay 4 is mapped to port 7 on both IO Module A1 (Top) and IO Module A2 (Bottom).
Compute sled IO Module A1 (Top)IO Module A2 (Bottom)
1a11
1b22
1c33
1d44
35, 6 (for half-width compute sled with quad-port NDC)5, 6 (for half-width compute sled with quad-port NDC)
5 (for half-width compute sled with dual-port NDC)5 (for half-width compute sled with dual-port NDC)
47, 8 (for half-width compute sled with quad-port NDC)7, 8 (for half-width compute sled with quad-port NDC)
7 (for half-width compute sled with dual-port NDC)7 (for half-width compute sled with dual-port NDC)

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