General memory module installation guidelines
To ensure optimal performance of your system, observe the following general guidelines when configuring your system memory. If your system's memory configurations fail to observe these guidelines, your system might not boot, stop responding during memory configuration, or operate with reduced memory. This section provides information on the memory population rules and about the non-uniform memory access (NUMA) for single or dual processor system.
The memory bus may operate at speeds of 4800 MT/s, 3200 MT/s, 2933 MT/s, or 2666 MT/s depending on the following factors:
- System profile selected (for example, Performance Optimized, or Custom [can be run at high speed or lower])
- Maximum supported DIMM speed of the processors
- Maximum supported speed of the DIMMs
NOTE: MT/s indicates DIMM speed in MegaTransfers per second.
The system supports Flexible Memory Configuration, enabling the system to be configured and run in any valid chipset architectural configuration. The following are the recommended guidelines for installing memory modules:
Memory interleaving with Non-uniform memory access (NUMA)
Non-uniform memory access (NUMA) is a memory design used in multi-processing, where the memory access time depends on the memory location relative to the processor. In NUMA, a processor can access its own local memory faster than the non-local memory.
NUMA nodes per socket (NPS) is a new feature added that allows you to configure the memory NUMA domains per socket. The configuration can consist of one whole domain (NPS1), two domains (NPS2), or four domains (NPS4). In the case of a two-socket platform, an additional NPS profile is available to have whole system memory to be mapped as single NUMA domain (NPS0). For more information on the memory interleaving for NPSx, see the Memory interleaving population rules section in this topic.
BIOS implementation for NPSx
NPS system optimization
Optimal system configuration is dependent on the processor model, memory configuration, and NPS settings. Match the memory configuration with the NPS settings available for the processor.
Table 2. Supported NPS modes by ProcessorsThis table describes supported NPS modes by the processors.
Model Number
|
NPS modes supported
|
7773X
|
4, 2, 1, 0
|
7573X
|
4, 2, 1, 0
|
75F3
|
4, 2, 1, 0
|
7713P
|
4, 2, 1
|
7663
|
4, 2, 1, 0
|
7513
|
4, 2, 1, 0
|
7543P
|
4, 2, 1
|
74F3
|
4, 2, 1, 0
|
7443
|
4, 2, 1, 0
|
7443P
|
4, 2, 1
|
7313P
|
4, 2, 1
|
7643
|
4, 2, 1, 0
|
72F3
|
4, 2, 1, 0
|
7742
|
4, 2, 1, 0
|
7702
|
4, 2, 1, 0
|
7662
|
4, 2, 1, 0
|
7642
|
4, 2, 1, 0
|
7552
|
2, 1, 0
|
7542
|
4, 2, 1, 0
|
7532
|
4, 2, 1, 0
|
7502
|
4, 2, 1, 0
|
7452
|
4, 2, 1, 0
|
7402
|
4, 2, 1, 0
|
7352
|
4, 2, 1, 0
|
7302
|
4, 2, 1, 0
|
7282
|
1, 0
|
7272
|
1, 0
|
7262
|
4, 2, 1, 0
|
7252
|
1, 0
|
7F72
|
2, 1, 0
|
7F52
|
4, 2, 1, 0
|
7F32
|
4, 2, 1, 0
|
7H12
|
4, 2, 1, 0
|
7713
|
4, 2, 1, 0
|
7543
|
4, 2, 1, 0
|
7763
|
4, 2, 1, 0
|
Table 3. Optimal NPS configurationThis tables describes the optimal NPS configuration.
Number of DIMMs per processor
|
NPS
|
0
|
1
|
2
|
4
|
1
|
-
|
-
|
-
|
X
|
2
|
-
|
-
|
-
|
X
|
3
|
-
|
-
|
-
|
X
|
4
|
-
|
X
|
-
|
-
|
5
|
-
|
-
|
-
|
X
|
6
|
-
|
-
|
-
|
X
|
7
|
-
|
-
|
-
|
X
|
8
|
X
|
X
|
-
|
-
|
9
|
-
|
-
|
-
|
X
|
10
|
-
|
-
|
-
|
X
|
11
|
-
|
-
|
-
|
X
|
12
|
-
|
-
|
X
|
-
|
13
|
-
|
-
|
-
|
X
|
14
|
-
|
-
|
-
|
X
|
15
|
-
|
-
|
-
|
X
|
16
|
X
|
X
|
-
|
-
|
- Recommended NPS setting is marked by X that indicate optimal performance.
- NPS0 is only available for dual processor systems and is the preferred setting.
- The NPS setting that are blank are functional. However, indicate non-optimal performance.
- BIOS default NPS setting is 1.
- UEFI0391 message may be displayed during boot if DIMMs are configured in the blank spaces of the table.
- If the processor does not support the desired NPS setting for a given number of DIMMs, then use default setting (NPS1) and the UEFI0391 message is displayed.
Memory interleaving population rules
- NPS4: Two channel interleaving
- This interleaves channel [A and B], [C and D], etc.
- Each channel within the pair requires at least one equal memory modules populated.
- Works with three memory modules per channel pair, non-symmetrical module is stacked on top (odd configurations).
- Any memory channel where one of the two channels is not populated is not interleaved.
- There is no alternate, as all configurations can be mapped into this mode.
- NPS2: Four channel interleaving
- This interleaves the four channels on the left or right half of a processor which are channels [A, B, C, D] and [E, F, G, H].
- All four channels require equal memory modules populated.
- Each half or interleave set may have different total memory capacity with respect to each other.
- NPS1: Eight channel interleaving
- This interleaves all channels in a processor [A, B, C, D, E, F, G, H].
- All channels in a processor require equal memory modules populated.
- Single processor system creates a single NUMA node for the system.
NOTE:An exception is allowed when system has 4-channels populated [C, D, G, H] with equal memory allowing the system to enter NPS1 mode even though all the 8 channels are not populated.
- NPS0: Sixteen channel interleaving (dual processor)
- This interleaves all 16 channels in a dual processor system.
- All channels in a system require equal memory modules populated.
- Dual processor systems create a single NUMA node for the system.