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Dell SmartFabric OS10 User Guide Release 10.5.3

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Manage clock selection

Clock synchronization depends to a large extent on QL or priority of the clock sources. However, you can influence clock selection by modifying the following clock properties:

  • Force switch—The switch forcibly selects a clock source regardless of its availability or quality. Use the sync-e switch force command to override the currently selected synchronization source. Ensure that the new source clock is enabled and is not locked out. Use the clear sync-e switch command to clear the force switch command.
  • Manual switch—The switch selects a synchronization source that is in enabled state, not locked out, not in signal fail condition, and has a QL better than Do Not Use (DNU) in QL-enabled mode. In QL-enabled mode, a manual switch is performed only to a source that has the highest available QL. Use the sync-e switch manual command to initiate a manual switch. Use the clear sync-e switch command to clear the manual switch command.
  • Lockout—The clock source is locked and it is not available for the selection process. Use the sync-e lockout command to lock a clock source on an interface. Use the clear sync-e lockout command to clear the lockout state of an interface so that the clock source on that interface can be considered for selection process.
  • Hold-Off Time—When a clock source goes down, the switch waits for the configured hold-off time period before removing the clock source from the clock selection process. The default time period is 300 milliseconds. Use the sync-e hold-off-time command to configure the hold-off time.
  • Wait-to-Restore Time—The amount of time that the switch waits before considering a previously failed synchronization source as available for the selection process, if it is fault free for the configured time period. The default time period is 300 seconds. Use the sync-e wait-to-restore-time command to configure the wait-to-restore time. Use the clear sync-e wait-restore-time command to stop the remaining timer and allow the ports to participate in clock selection.

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